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Job Description
Seeking a highly motivated and innovative digital engineer with excellent theoretical and practical background in high-speed data recovery circuits. Working as part of a highly experienced mixed-signal design team, the candidate will be involved in digital design of current and next generation Backplane Ethernet, PCIe, SATA, and USB 2/3 SERDES products. The position offers an excellent opportunity to work with a skilled team of digital and mixed signal engineers responsible for delivering high-end mixed-signal design. The activities would include:
• Prior FPGA/ASIC digital design experience in the industry (minimum 2 years)
• Proficient in Verilog and/or SystemVerilog
• Bachelors or Masters (preferred) in Computer Engineering, or Electrical Engineering, or equivalent
• Familiarity with digital simulation, waveform viewing tools
'• Experience writing scripts in languages such as Perl and Unix shell
Our Silicon Design & Verification business is all about building high-performance silicon chips—faster. We’re the world’s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance—eliminating months off their project schedules.
At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
Stay Connected: Join our Talent Community
Synopsys Canada ULC values the diversity of our workforce. We are committed to provide access & opportunity to individuals with disabilities and will provide reasonable accommodation to individuals throughout the recruitment and employment process. Should you require an accommodation, please contact hr-help-canada@synopsys.com.
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- Understanding the design.
- Defining the design specs.
- Developing the design flows for timing analysis/spyglass.
- Integrate Analog schematics/behavior models with digital design.
- Work with verification team on debugs/ and verifying the correctness of the RTL design.
• Prior FPGA/ASIC digital design experience in the industry (minimum 2 years)
• Proficient in Verilog and/or SystemVerilog
• Bachelors or Masters (preferred) in Computer Engineering, or Electrical Engineering, or equivalent
• Familiarity with digital simulation, waveform viewing tools
'• Experience writing scripts in languages such as Perl and Unix shell
Our Silicon Design & Verification business is all about building high-performance silicon chips—faster. We’re the world’s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance—eliminating months off their project schedules.
At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
Stay Connected: Join our Talent Community
Synopsys Canada ULC values the diversity of our workforce. We are committed to provide access & opportunity to individuals with disabilities and will provide reasonable accommodation to individuals throughout the recruitment and employment process. Should you require an accommodation, please contact hr-help-canada@synopsys.com.