Job Description
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Position Summary
With a wide range of industry-leading semiconductor solutions, we’re enabling innovative growth in markets segments from hyperscale data centers and automotive to IoT, mobile and consumer electronics.SSIR is one of the largest R&D center outside Korea and a microcosm for Samsung Semiconductors. Our engineers get to work across diverse domains, projects, products, clients, people and countries, and also conduct research in new and emerging areas of technology. We take pride in our ability to work on the futuristic technologies as innovation and creativity is highly valued at SSIR. We strive towards providing high reliability; high performance and value added services that enables Samsung Semiconductors to deliver world class products.
What we offer
Samsung is a global leader in technology, opening new possibilities for people everywhere. In our center you will be part of a dynamic team, in an international work environment. Being one of the best in the industry comes with hard work, but we also make it rewarding through:
Best in the industry compensation
Free breakfasts and lunches in our office
Flexible working hours/ Hybrid work environment
Transport facilities
Health & wellbeing: wellness program, e.g. subsidized gym subscription
Quarterly team events and various team activities
Learning and Development opportunities
Role and Responsibilities
- Complex SOC Top Physical Implementation for next generation SOCs in area of mobile application processors, modem sub-systems and connectivity chips by means of Synthesis , Place and Route, STA , timing and physical signoffs
- Hands on experience doing physical design and timing closure of complex blocks and full-chip designs.
- Experience in top level floor planning including partition shaping and sizing, pin placement, channel planning, high speed signal and clock planning and feed-through planning is a plus.
- Should have strong understanding of timing, power and area trade-offs and optimization of PPA.
- Power user of industry standard tools (ICC/DC/PT/VSLP/Redhawk/Calibre/Formality) and able to understand their capabilities.
- Should have solid understanding of scripting languages such as Perl/Tcl and implementation flows.
- Experience with large SOC designs (>20M gates) with frequencies in excess of 1GHZ .
- Expertise in block level and full-chip SDC clean up, Synthesis optimization , Low Power checking and logic equivalence checking.
- Familiar with deep sub-micron designs (8nm/5nm) and associated issues (manufacturability, power, signal integrity, scaling).
- Familiar with typical SOC issues such as multiple voltage and clock domains, ESD strategies, mixed signal block integration, and package interactions.
- Familiar in hierarchical design, top-down design, budgeting, timing and physical convergence.
- Good understanding of Physical Design Verification methodology to debug LVS/DRC issues at chip/block level.
- Should have gone through recent successful SOC tape-outs.
Skills and Qualifications
B.E/B.Tech/M.E/M.Tech/PhD
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About Us
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Samsung Electronics is a global leader in technology, opening new possibilities for people everywhere. Through relentless innovation and discovery, we are transforming the worlds of TVs, smartphones, wearable devices, tablets, digital appliances, and network systems, and the entire semiconductor industry with our memory, system LSI, foundry, and LED solutions. Samsung is also leading in the development of the Internet of Things through, among others, our Smart Home and Digital Health initiatives.
Since being established in 1969, Samsung Electronics has grown into one of the world’s leading technology companies, and become recognized as one of the top global brands. Our network now extends across the world, and Samsung takes great pride in the creativity and diversity of its talented people, who drive our growth. To discover more, please visit our official newsroom at ( https://news.samsung.com/global/ ).