Memory Layout Design Engineer - Zortechsolutions
  • Ottawa, Ontario, Canada
  • via Jobleads.com
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Job Description

Role: Memory Layout Design Engineer

Location : Kanata, ON

Status: Contract

Job Description

  • 5+ Years of experience in Memory Layout Design.
  • Good knowledge of CMOS & Finfet technoloies, preferable in 3nm and 5nm technology nodes.
  • Should have hands on experience in design of Sense Amp, decoders, IO and control blocks.
  • Should have working knowledge on PG, ECO and Fill cells.
  • Should have good understanding of Quality Check for layouts developed and delivered.
  • Hands on expertise in industry standard tools - Cadence Virtuoso L/XL/GXL, Calibre etc.
  • Should have a working knowledge on EM/IR and Antenna checks.
  • Should be diligent and flexible.
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